CHEN, Xinyu - HKUST Class Schedule & Quota

Class Schedule & Quota
2025-26 Fall 2024-25 Summer 2024-25 Spring 2021-22 Winter
2025-26 Fall
Common Core Course
The class information on this page will normally be updated every 15 to 20 minutes during class enrollment period.
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This service was first adapted from a student contribution in 2011-12 Fall. The efforts of all concerned are duly acknowledged.

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COURSE INFO

VECTOR	[3-0-0:3]
DESCRIPTION	Being able to customize hardware architecture to application's exact needs, FPGA-based accelerators deliver better efficiency than general architectures such as CPUs. This course provides a comprehensive overview of FPGA-based accelerators and other domain specific architectures from historical contexts to recent trends in system designs spanning a collection of architectural techniques and a variety of application domains. Additionally, the course delves into methods for performance analysis and emphasizes on practical experience with parallel programming for FPGA platforms. This hands-on approach ensures students gain a deep understanding of domain specific architectures.

VECTOR

[3-0-0:3]

DESCRIPTION

Being able to customize hardware architecture to application's exact needs, FPGA-based accelerators deliver better efficiency than general architectures such as CPUs. This course provides a comprehensive overview of FPGA-based accelerators and other domain specific architectures from historical contexts to recent trends in system designs spanning a collection of architectural techniques and a variety of application domains. Additionally, the course delves into methods for performance analysis and emphasizes on practical experience with parallel programming for FPGA platforms. This hands-on approach ensures students gain a deep understanding of domain specific architectures.

MICS 6001C - Customized Computing with FPGAs (3 units)

Section	Date & Time	Room	Instructor	Quota	Enrol	Avail	Wait	Remarks
L01 (6188)	Th 09:00AM - 11:50AM	Rm 202, E1	CHEN, Xinyu	20	13	7	0