 |
| VECTOR | [2-1-0:3] |
|---|---|
| PREVIOUS CODE | MICS 6000D |
| DESCRIPTION | This course is about fundamentals in optics and photonics. The “Optics” part includes ray optics, electromagnetic optics, plasmonics, coherence and polarization of light, etc. The “Photonics” part includes the science behind light generation (e.g. laser), manipulation (e.g. based on nonlinear optics) and photodetection (e.g. PN junction diodes). |
| Section | Date & Time | Room | Instructor | Quota | Enrol | Avail | Wait | Remarks |
|---|---|---|---|---|---|---|---|---|
| L01 (6178) | Tu 01:30PM - 03:20PM | Rm 105, E3 | CHENG, Bojun | 20 | 6 | 14 | 0 | |
| T01 (6180) | Tu 03:30PM - 04:20PM | Rm 105, E3 | CHENG, Bojun | 20 | 6 | 14 | 0 |
| VECTOR | [3-0-0:3] |
|---|---|
| PREVIOUS CODE | MICS 6000F |
| DESCRIPTION | This course guides the students through the fundamentals of analog integrated circuits design in CMOS technologies. Knowledge in analog design is essential for further research and study in the IC design tracks. This course will cover the operation of MOSFETs, basic concepts of analog circuits design, the implementation of basic analog circuits from MOSFETs, and the realization of more complex CMOS circuits using basic analog building blocks. |
| Section | Date & Time | Room | Instructor | Quota | Enrol | Avail | Wait | Remarks |
|---|---|---|---|---|---|---|---|---|
| L01 (6183) | Mo 01:30PM - 04:20PM | Rm 202, W2 | ZONG, Zhirui | 20 | 11 | 9 | 0 |
| VECTOR | [3-0-0:3] |
|---|---|
| PREVIOUS CODE | MICS 6000G |
| DESCRIPTION | This is a foundation course in radio frequency integrated circuit design. The covered topics include basic concepts in RF design and wireless communication, transmission lines, passive devices, transceiver architectures, low noise amplifiers, mixers, baseband, phase-locked loops, power amplifier and transceiver SoC design. |
| Section | Date & Time | Room | Instructor | Quota | Enrol | Avail | Wait | Remarks |
|---|---|---|---|---|---|---|---|---|
| L01 (6362) | Tu 01:30PM - 04:20PM | Rm 201, E3 | HUANG, Zhiqiang | 20 | 4 | 16 | 0 |
| VECTOR | [3-0-0:3] |
|---|---|
| PREVIOUS CODE | MICS 6000I |
| DESCRIPTION | This course introduces the foundations of modern VLSI electronic design automation (EDA), with a focus on optimization and algorithm foundations for VLSI physical design problems. We will introduce partitioning, floor planning, placement, routing, manufacturability optimization, and mask optimization. We will see a set of concrete applications of various conventional optimization techniques in VLSI design, e.g., graph theory, convex programming, numerical optimization, etc. |
| Section | Date & Time | Room | Instructor | Quota | Enrol | Avail | Wait | Remarks |
|---|---|---|---|---|---|---|---|---|
| L01 (6185) | Tu 01:30PM - 04:20PM | Rm 201, W4 | MA, Yuzhe | 20 | 11 | 9 | 0 |
| VECTOR | [3-0-0:3] |
|---|---|
| PREVIOUS CODE | MICS 6000E |
| DESCRIPTION | This course aims to introduce photonics technology from devices to systems for high-capacity optical interconnects within the integrated circuit package. The course covers topics such as an introduction to optical interconnects, optical waveguides and fibers, attenuation and dispersion, fundamentals of key optoelectronic devices, high-speed optical transmitters and receivers, optical communication systems, advanced modulation formats and detection schemes, multiplexing techniques, as well as the latest trends and developments in optical interconnect technology. |
| Section | Date & Time | Room | Instructor | Quota | Enrol | Avail | Wait | Remarks |
|---|---|---|---|---|---|---|---|---|
| L01 (6393) | Fr 01:30PM - 04:20PM | Rm 201, W4 | TONG, Ye Yu | 20 | 6 | 14 | 0 |
| VECTOR | [3-0-0:3] |
|---|---|
| DESCRIPTION | Being able to customize hardware architecture to application's exact needs, FPGA-based accelerators deliver better efficiency than general architectures such as CPUs. This course provides a comprehensive overview of FPGA-based accelerators and other domain specific architectures from historical contexts to recent trends in system designs spanning a collection of architectural techniques and a variety of application domains. Additionally, the course delves into methods for performance analysis and emphasizes on practical experience with parallel programming for FPGA platforms. This hands-on approach ensures students gain a deep understanding of domain specific architectures. |
| Section | Date & Time | Room | Instructor | Quota | Enrol | Avail | Wait | Remarks |
|---|---|---|---|---|---|---|---|---|
| L01 (6188) | Th 09:00AM - 11:50AM | Rm 202, E1 | CHEN, Xinyu | 20 | 13 | 7 | 0 |
| VECTOR | [3-0-0:3] |
|---|---|
| DESCRIPTION | Sensors and their associated signal conditioning and processing circuits are the key components in many biomedical instruments which play an important role in the monitoring, diagnosis and treatment of diseases in healthcare. This course provides a comprehensive investigation for some important and widely used sensors and circuits for the biomedical applications with focus on the wearable sensing system and medical imaging system. This course will cover the fundamental working principles of the sensors, the characteristics of the sensing output signals, the signal conditioning and processing circuits, system level integrations, and their biomedical applications. |
| Section | Date & Time | Room | Instructor | Quota | Enrol | Avail | Wait | Remarks |
|---|---|---|---|---|---|---|---|---|
| L01 (6192) | Mo 09:00AM - 11:50AM | Rm 202, W2 | JIANG, Wei | 20 | 5 | 15 | 0 |
| VECTOR | [3-0-0:3] |
|---|---|
| PREVIOUS CODE | SEEN 6000G |
| DESCRIPTION | Spiking Neural Networks represent the third generation of neural network models, differentiating themselves by more closely mimicking the biological processes of the human brain. Unlike traditional artificial neural networks that process information in a continuous manner, SNNs incorporate the concept of time directly into their operating model, using spikes for communication and computation, which makes them powerful tools for modeling temporal dynamics and learning from spatio-temporal data. This course includes modules: Introduction to Neural Computation; Biological Foundations and Neuron Modeling; Network Architectures and Dynamics Connectivity patterns in SNNs; Learning in Spiking Neural Networks, Hebbian learning and STDP; Simulation and lmplementation Tools and frameworks for simulating SNNs; Applications and Future Directions. |
| Section | Date & Time | Room | Instructor | Quota | Enrol | Avail | Wait | Remarks |
|---|---|---|---|---|---|---|---|---|
| L01 (6681) | Th 09:00AM - 11:50AM | Room 521H VR Room, W1 | XU, Renjing | 40 | 33 | 7 | 0 |
| VECTOR | [3-0-0:3] |
|---|---|
| DESCRIPTION | This course will first discuss the traditional symbolic reasoning techniques, covering propositional logic, predicate calculus, and classical reasoning methods including Boolean satisfiability solving, model checking and interactive theorem proving. It will then explore the combination of neural networks and symbolic reasoning, including neural heuristics for symbolic reasoning, the neural logic network, the neural Turing machine, neural program induction and synthesis, etc. |
| Section | Date & Time | Room | Instructor | Quota | Enrol | Avail | Wait | Remarks |
|---|---|---|---|---|---|---|---|---|
| L01 (6195) | We 01:30PM - 04:20PM | Rm 202, W2 | ZHANG, Hongce | 20 | 7 | 13 | 0 |
| VECTOR | [3-0-0:3] |
|---|---|
| DESCRIPTION | This course offers an in-depth exploration of the essential principles underlying modern integrated circuits (ICs), with a focus on power converters. Students will explore the fundamentals of IC design before diving into two basic types of power converters. Through a combination of theoretical instruction and practical case studies, participants will gain a comprehensive understanding of integrated power converters, including their operation principles, design considerations, challenges and applications. By the end of this course, students will be equipped with the knowledge to design and analyze two important power converters. |
| Section | Date & Time | Room | Instructor | Quota | Enrol | Avail | Wait | Remarks |
|---|---|---|---|---|---|---|---|---|
| L01 (6203) | Tu 09:00AM - 11:50AM | Rm 202, W2 | CAI, Guigang | 20 | 5 | 15 | 0 |
| VECTOR | [3-0-0:3] |
|---|---|
| DESCRIPTION | This course will explore the physics and properties of semiconductor micro and nano structures, physics and characteristics of semiconductor microdevices, and their electronic and photonic applications as active components. This course will discuss how the semiconductor micro/nano structuring and device miniaturization affect their properties and characteristics. This course will investigate the physics, design, and fundamental properties of Si, Ge, GaN-based, GaAs-based semiconductor micro and nanostructures. It will also cover two-dimensional gas and high electron mobility transistors, quantum wells/dots and semiconductor devices, microstructures and light-receiving microdevices, physics of micro light sources, edge- and surface-emitting microlasers, microwires and microwire devices, carrier confinement, photonic confinement and microcavities, advanced solar cells and solar-hydrogen devices. The goal of this course is to develop a comprehensive understanding of micro/nano structuring and device miniaturization of the next generation semiconductor technologies and applications. |
| Section | Date & Time | Room | Instructor | Quota | Enrol | Avail | Wait | Remarks |
|---|---|---|---|---|---|---|---|---|
| L01 (6205) | Tu 09:00AM - 11:50AM | Rm 201, W4 | WANG, Renjie | 20 | 6 | 14 | 0 |
| VECTOR | [3-0-0:3] |
|---|---|
| DESCRIPTION | This course aims to build a strong foundation and equip students with insights and techniques in modern microprocessor architecture for future system design. The course covers fundamental and advanced concepts, including processor design, memory hierarchy, pipelining, caching, multicore architectures, GPU, interconnection networks, and domain-specific optimizations. Students will gain a deep understanding of how microprocessors are designed and optimized for performance, efficiency, and scalability, preparing them for challenges in the evolving landscape of computing. |
| Section | Date & Time | Room | Instructor | Quota | Enrol | Avail | Wait | Remarks |
|---|---|---|---|---|---|---|---|---|
| L01 (6209) | Th 09:00AM - 11:50AM | Rm 201, E3 | HUANG, Jiayi | 20 | 5 | 15 | 0 |
| VECTOR | [3-0-0:3] |
|---|---|
| DESCRIPTION | This course is designed for students aiming to master the art of parallel computing using NVIDIA's CUDA platform. Offering a comprehensive exploration of CUDA and C++ programming, the course emphasizes the development of efficient, high-performance applications optimized for modern GPU architectures. Students will learn to harness the computational power of GPUs by understanding core concepts such as memory hierarchy, thread management, and performance optimization techniques. Through a combination of theoretical insights and practical hands-on sessions, students will gain the skills necessary to tackle complex computational problems across various domains. |
| Section | Date & Time | Room | Instructor | Quota | Enrol | Avail | Wait | Remarks |
|---|---|---|---|---|---|---|---|---|
| L01 (6210) | We 09:00AM - 11:50AM | Rm 202, W4 | LIN, Shiju | 40 | 35 | 5 | 0 |
| VECTOR | [3-0-0:3] |
|---|---|
| DESCRIPTION | This course equips students with the essential knowledge and skills to develop and optimize hardware solutions tailored for specific applications. It covers fundamental principles of hardware acceleration, focusing on the unique requirements and challenges of various applications. Students will learn to leverage custom architectures and design techniques to create efficient domain-specific accelerators that enhance performance and reduce power consumption compared to general-purpose processors. Key topics include architectural design, profiling and optimizing algorithms, and integrating hardware and software components, ultimately preparing students to design, implement, and evaluate cutting-edge hardware solutions in their fields. |
| Section | Date & Time | Room | Instructor | Quota | Enrol | Avail | Wait | Remarks |
|---|---|---|---|---|---|---|---|---|
| L01 (6211) | Fr 01:30PM - 04:20PM | Rm 202, W2 | HUANG, Shanshi | 20 | 10 | 10 | 0 |
| VECTOR | [3-0-0:3] |
|---|---|
| DESCRIPTION | This course equips students with critical knowledge and techniques for designing and optimizing modern heterogeneous computing systems. It offers a comprehensive understanding of heterogeneous computing architecture, i.e., the CPU+NPU+DPU+GPU. Students will learn how to leverage different hardware features to achieve a high-performance and power-efficient computing system. Through an in-depth understanding of unified memory programming, asynchronous communication, direct memory access, and workload in/off-loading, students will gain the skills to optimize the heterogeneous system for building an efficient system. |
| Section | Date & Time | Room | Instructor | Quota | Enrol | Avail | Wait | Remarks |
|---|---|---|---|---|---|---|---|---|
| L01 (6212) | Mo 01:30PM - 04:20PM | Rm 105, E3 | CHEN, Yun | 20 | 15 | 5 | 0 |
| VECTOR | [3-0-0:3] |
|---|---|
| DESCRIPTION | This course provides a comprehensive exploration of in-memory processing paradigm, focusing on the integration of memory and computational processes to improve hardware efficiency and performance. Students will investigate various memory device technologies and their corresponding compute-in-memory circuit and architecture designs. The course begins with an overview of in-memory computing concepts, highlighting the paradigm shift from traditional von Neumann architectures to memory-centric processing. Students will delve into the characteristics and functionalities of various memory technologies, and analyze their unique advantages, limitations, and applications in process-in-memory systems. |
| Section | Date & Time | Room | Instructor | Quota | Enrol | Avail | Wait | Remarks |
|---|---|---|---|---|---|---|---|---|
| L01 (6213) | Tu 01:30PM - 04:20PM | Rm 201, E4 | JIANG, Hongwu | 20 | 11 | 9 | 0 |
| VECTOR | [3-0-0:3] |
|---|---|
| DESCRIPTION | This graduate-level course provides a comprehensive introduction to the principles and characterization techniques of microelectronic devices. The curriculum is structured into two main sections: device principles and device characterization. In the first section, students will explore the essential physics of microelectronic devices. Topics include the carrier statistics, PN and metal semiconductor junctions, and the operation of MOSFETs. This part of the course aims to build a solid understanding of device models that are critical for further study. The second section focuses on contemporary characterization methods used to assess semiconductor materials and device parameters. Students will gain insights into the theoretical concepts underpinning these techniques, with topics covering resistivity, doping profiles, barrier heights, MOS device interfaces, and MOSFET channel parameters. Emphasis will be placed on understanding the methodologies and technologies employed in the precise characterization of microelectronic devices. This course is designed to equip students with both the theoretical knowledge and practical skills necessary for analyzing and optimizing microelectronic devices in advanced technological applications. |
| Section | Date & Time | Room | Instructor | Quota | Enrol | Avail | Wait | Remarks |
|---|---|---|---|---|---|---|---|---|
| L01 (6214) | We 01:30PM - 04:20PM | Rm 201, W4 | LIU, Xiwen | 20 | 5 | 15 | 0 |
| VECTOR | [3-0-0:3] |
|---|---|
| DESCRIPTION | This course introduces the probabilistic computing system and the related underlying knowledge. The content includes the reviewing of the basic knowledge of probability, machine learning systems based on probabilistic computing as well as related device techniques that can be leveraged in constructing the hardware probabilistic computing systems. Through the course, the students will have a refresh of the knowledge of probability, and obtain the basic knowledge of the probabilistic machine learning models such as generative models for discrete data, linear and logistic regression models based on probability directed graphical models and mixture models. On the hardware side, the students will learn how probability distributions can be efficiently generated by novel devices, which the appropriate materials and device physics. |
| Section | Date & Time | Room | Instructor | Quota | Enrol | Avail | Wait | Remarks |
|---|---|---|---|---|---|---|---|---|
| L01 (6215) | Tu 01:30PM - 04:20PM | Rm 202, E4 | YANG, Kezhou | 20 | 7 | 13 | 0 |
| VECTOR | [2-1-0:3] |
|---|---|
| DESCRIPTION | The course focuses on the communication problem of on-chip many-core architectures. It introduces basic concepts and principles of on-chip bus and interconnection network, in particular, about network topology, routing and flow control, deadlock/livelock, and quality-of-service (QoS) et cetera. It presents the micro-architecture details of on-chip router and network interface designs for both message passing and shared memory systems. Furthermore, theoretical and experimental performance evaluation methodology will be investigated. |
| Section | Date & Time | Room | Instructor | Quota | Enrol | Avail | Wait | Remarks |
|---|---|---|---|---|---|---|---|---|
| L01 (6216) | We 01:30PM - 03:20PM | Rm 202, E1 | LU, Zhonghai | 30 | 8 | 22 | 0 | |
| T01 (6217) | We 03:30PM - 04:20PM | Rm 202, E1 | LU, Zhonghai | 30 | 8 | 22 | 0 |
| VECTOR | [1 credit] |
|---|---|
| DESCRIPTION | An independent study on selected topics carried out under the supervision of a faculty member. |
| Section | Date & Time | Room | Instructor | Quota | Enrol | Avail | Wait | Remarks |
|---|---|---|---|---|---|---|---|---|
| R01 (6691) | TBA | TBA | TBA | 20 | 5 | 15 | 0 |
| DESCRIPTION | Master's thesis research supervised by co-advisors from different disciplines. A successful defense of the thesis leads to the grade Pass. No course credit is assigned. |
|---|
| Section | Date & Time | Room | Instructor | Quota | Enrol | Avail | Wait | Remarks |
|---|---|---|---|---|---|---|---|---|
| R01 (6052) | TBA | No room required | TBA | 999 | 32 | 967 | 0 |
| DESCRIPTION | Original and independent doctoral thesis research supervised by co-advisors from different disciplines. A successful defense of the thesis leads to the grade Pass. No course credit is assigned. |
|---|
| Section | Date & Time | Room | Instructor | Quota | Enrol | Avail | Wait | Remarks |
|---|---|---|---|---|---|---|---|---|
| R01 (6053) | TBA | No room required | TBA | 999 | 58 | 941 | 0 |